# RTL Design Lead

> Erbity Private Limited · Noida, India · Full-time · Posted 2026-06-02

**Workplace:** on_site

**Department:** Design & Architecture

## Description

**Job Description:**

-   Lead RTL design activities for complex ASIC/SoC development projects.
-   Work closely with architecture and verification teams to define micro-architecture and implementation strategies.
-   Develop high-quality RTL using Verilog/SystemVerilog.
-   Drive block-level design, integration, lint, CDC, and synthesis activities.
-   Ensure design quality and timely project execution.
-   Debug and resolve design issues during simulation, synthesis, and silicon bring-up stages.
-   Collaborate with cross-functional teams including DFT, Physical Design, and Verification.
-   Mentor junior engineers and support technical reviews.

**Required Skills:**

-   Strong experience in RTL Design for ASIC/SoC projects.
-   Hands-on expertise in Verilog/SystemVerilog.
-   Good understanding of AMBA protocols (AXI/AHB/APB).
-   Experience with synthesis, lint, CDC, and low-power design methodologies.
-   Strong debugging and problem-solving skills.
-   Prior team handling or technical leadership experience is preferred.

## Apply

[Apply at Erbity Private Limited](https://apply.workable.com/erbity/j/1EB3E0C9F2/apply)

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