# Analog Layout Engineer

> Weekday AI · Bengaluru, India · Full-time · Posted 2026-08-12

**Salary:** INR 2,500,000–4,000,000

**Workplace:** on_site

**Department:** Weekday's Client via platform

## Description

𝗧𝗵𝗶𝘀 𝗿𝗼𝗹𝗲 𝗶𝘀 𝗳𝗼𝗿 𝗼𝗻𝗲 𝗼𝗳 𝘁𝗵𝗲 𝗪𝗲𝗲𝗸𝗱𝗮𝘆'𝘀 𝗰𝗹𝗶𝗲𝗻𝘁𝘀

𝗦𝗮𝗹𝗮𝗿𝘆 𝗿𝗮𝗻𝗴𝗲: 𝗥𝘀 𝟮𝟱𝟬𝟬𝟬𝟬𝟬 - 𝗥𝘀 𝟰𝟬𝟬𝟬𝟬𝟬𝟬 (𝗶𝗲 𝗜𝗡𝗥 𝟮𝟱-𝟰𝟬 𝗟𝗣𝗔)

Experience: 5+ yrs

Location: Bengaluru

Job Type: Full-time

As an Analog Layout Engineer, you will be responsible for translating circuit designs and schematics into optimized physical layouts while maintaining performance, reliability, and design-rule compliance. You will work on advanced-node technologies and contribute to custom IO layout activities, ensuring that designs meet electrical, physical, and manufacturing requirements.

The role requires strong attention to detail, an understanding of analog layout principles, and the ability to collaborate effectively with circuit design, verification, and physical design teams.

## Requirements

### Key Responsibilities

-   Develop and implement high-quality analog and custom layouts based on circuit schematics and design specifications.
-   Work extensively on **16FF Custom IO Layout** and advanced-node semiconductor designs.
-   Perform floorplanning, placement, routing, matching, shielding, and layout optimization.
-   Apply analog layout techniques such as common-centroid, interdigitation, symmetry, matching, and guard-ring implementation.
-   Ensure layouts comply with technology design rules, reliability requirements, and manufacturing constraints.
-   Perform physical verification activities including **DRC, LVS, and related checks**.
-   Identify and resolve layout-related issues in collaboration with circuit designers and verification teams.
-   Optimize layouts for performance, area, signal integrity, and power requirements.
-   Participate in design reviews and provide layout inputs to improve circuit performance and manufacturability.
-   Maintain accurate layout documentation and follow established design methodologies and quality standards.
-   Support debugging and resolution of physical verification and integration issues.
-   Collaborate with cross-functional teams throughout the design and tape-out lifecycle.

### What Makes You a Great Fit

-   **5+ years of experience** in analog/custom IC layout engineering.
-   Strong hands-on expertise in **16FF Custom IO Layout**.
-   Experience with advanced semiconductor process technologies and custom analog/mixed-signal layouts.
-   Strong understanding of analog layout concepts, matching techniques, parasitic effects, and physical design constraints.
-   Hands-on experience with layout and physical verification tools.
-   Good knowledge of **DRC, LVS, ERC**, and other physical verification processes.
-   Ability to interpret schematics and understand circuit-level requirements.
-   Strong debugging and problem-solving skills with excellent attention to detail.
-   Ability to work effectively with analog designers, verification engineers, and other semiconductor engineering teams.
-   Strong understanding of design quality, reliability, and tape-out requirements.
-   Good communication skills and the ability to work independently as well as within a collaborative engineering environment.

## Apply

[Apply at Weekday AI](https://apply.workable.com/weekday-1/j/6A2AE8318F/apply)

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